Non-volatile memory (“NVM”) arrays, such as erasable, programmable read only memory (EPROM) or flash memory arrays, or electrically erasable, programmable read only memory (EEPROM) arrays, require high positive or negative voltages to program and erase memory cells of the array. Typically, these voltages are higher than the voltage supplied for other operations (Vdd). Voltage/Current sources are generally used to boost on-chip voltages above the supply voltage Vdd to reach the voltages required for programming or erasing. A charge pump may be used as a voltage/current source.
A charge pump may comprise cascaded stages that progressively boost the output voltage to higher levels. The charge pump may progressively store an increasing charge on a capacitor that is part of a capacitor-diode combination, with several such stages being placed together in a network to obtain the desired increase in voltage.
Reference is made to FIG. 1 which illustrates four stages of a commonly used four-stage charge pump architecture, called a four-phased-clock, threshold-voltage-canceling pump architecture (see Umezawa, IEEE Journal of Solid State Circuits, Vol. 27, 1992, page 1540).
The charge pump circuit includes a plurality of charge transfer transistors (reference letters m1) connected in series. In FIG. 1, four such charge transfer transistors are shown, labeled m1, m2, m3 and m4. Charge transfer transistors m1 may use, but are not limited to, CMOS (complementary metal oxide semiconductor) technology, being either n-channel or p-channel (NMOS or PMOS) field effect transistors (FETs). FIG. 1 illustrates a positive charge pump based on NMOS.
For the optimal design of voltage/current sources, such as charge pumps, it may be advantageous to know the characteristics of the load being driven by the power source. However, in some cases, it may be difficult to predict the output current that may be required by the load. For example, in memory devices, such as EPROM, Flash or EEPROM memory devices, many memory cells may require a high voltage at the same time, for example, to perform program and erase operations. In such operations, the current drawn by the the NVM cell may vary significantly based on factors such as voltage, temperature, process corners, number of program/erase cycles already passed, etc. If the total current of many NVM cells exceeds the capacity of the voltage/current source, then the voltage/current source may not be able to supply the required voltage to perform the operation of the memory device.
In addition to the difficulties in predicting the current required by a particular load, it may also be difficult to predict the output of the voltage/current source, because it may be dependent upon many unstable variables such as the positive voltage supply (Vdd), temperature, process conditions and load. As such, an appropriate regulation apparatus may be used to control and provide a desired voltage at the output of the voltage/current source.
Accordingly, in many cases, a regulation method may be used to enhance the operation of the charge pump. This may be accomplished by using a regulator to regulate the pump output. There are many approaches to regulating the output voltage, e.g., by Vdd voltage, Vdd current, by clock frequency, etc. The regulator may typically adjust the capability of the charge pump according to the required current of the load. Thus, for example, if the current of the load exceeds a maximum value, the regulator may not be able to adjust the charge pump and it may stay in saturation.
Known methods of regulating the output voltage of a charge pump suffer from limitations that may significantly affect the overall efficiency of its operation.
For example, one known method for providing regulation of the output of a charge pump suffers from the drawback of current inefficiency. As shown in the illustration of FIG. 2, the regulated output voltage of charge pump 100 which is driven to load 120 is fed into a voltage divider 102 and compared to a reference voltage (Vref) 104 at operational amplifier 106. In this circuit, the regulation of the output of charge pump 100 is achieved by shunting the output to ground 108. Thus, when charge pump 100 operates at minimum energy, e.g., low Vdd, the current dissipated through ground 108 is, likewise, low. However, when charge pump 100 operates at higher energy conditions, e.g., high Vdd, current is dissipated through ground 108, resulting in inefficient operation of the regulating system of FIG. 2.